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d a t a sh eet product speci?cation supersedes data of 2002 mar 12 2003 may 06 integrated circuits 74lvc138a 3-to-8 line decoder/demultiplexer; inverting
2003 may 06 2 philips semiconductors product speci?cation 3-to-8 line decoder/demultiplexer; inverting 74lvc138a features 5 v tolerant inputs for interfacing with 5 v logic wide supply voltage range from 1.2 to 3.6 v cmos low power consumption direct interface with ttl levels inputs accept voltages up to 5.5 v demultiplexing capability multiple input enable for easy expansion ideal for memory chip select decoding active low mutually exclusive outputs output drive capability 50 w transmission lines at 125 c complies with jedec standard no. 8-1a esd protection: hbm eia/jesd22-a114-a exceeds 2000 v mm eia/jesd22-a115-a exceeds 200 v. specified from - 40 to +85 c and - 40 to +125 c. description the 74lvc138a is a high-performance, low-power, low-voltage, si-gate cmos device, superior to most advanced cmos compatible ttl families. the 74lvc138a accepts three binary weighted address inputs (a0, a1 and a2) and when enabled, provides 8 mutually exclusive active low outputs ( y0 to y7). the 74lvc138a features three enable inputs: two active low ( e1 and e2) and one active high (e3). every output will be high unless e1 and e2 are low and e3 is high. this multiple enable function allows easy parallel expansion of the 74lvc138a to a 1-of-32 (5 to 32 lines) decoder with just four 74lvc138a ics and one inverter. the 74lvc138a can be used as an eight output demultiplexer by using one of the active low enable inputs as the data input and the remaining enable inputs as strobes. unused enable inputs must be permanently tied to their appropriate active high or low state. quick reference data gnd = 0 v; t amb =25 c; t r =t f 2.5 ns. notes 1. c pd is used to determine the dynamic power dissipation (p d in m w). p d =c pd v cc 2 f i n+ s (c l v cc 2 f o ) where: f i = input frequency in mhz; f o = output frequency in mhz; c l = output load capacitance in pf; v cc = supply voltage in volts; n = total switching outputs; s (c l v cc 2 f o ) = sum of the outputs. 2. the condition is v i = gnd to v cc . symbol parameter conditions typical unit t phl /t plh propagation delay an to yn c l = 50 pf; v cc = 3.3 v 2.6 ns propagation delay e3 to yn c l = 50 pf; v cc = 3.3 v 2.8 ns propagation delay en to yn c l = 50 pf; v cc = 3.3 v 2.7 ns c i input capacitance 4.0 pf c pd power dissipation capacitance per gate v cc = 3.3 v; notes 1 and 2 21 pf
2003 may 06 3 philips semiconductors product speci?cation 3-to-8 line decoder/demultiplexer; inverting 74lvc138a ordering information function table see note 1. note 1. h = high voltage level; l = low voltage level; x = dont care. type number package temperature range pins package material code 74lvc138ad - 40 to +125 c 16 so16 plastic sot109-1 74lvc138adb - 40 to +125 c 16 ssop16 plastic sot338-1 74lvc138apw - 40 to +125 c 16 tssop16 plastic sot403-1 74LVC138ABQ - 40 to +125 c 16 dhvqfn16 plastic sot763-1 input output e1 e2 e3 a0 a1 a2 y0 y1 y2 y3 y4 y5 y6 y7 hxxxxx hhhhhhhh xhxxxx hhhhhhhh xx l xxxhhhhhhhh llhllll hhhhhhh l lhhl lhlhhhhhh l lhlhlhhlhhhhh l lhhhlhhhlhhhh l lhl lhhhhhlhhh l lhhlhhhhhhlhh l lhlhhhhhhhhlh l lhhhhhhhhhhhl
2003 may 06 4 philips semiconductors product speci?cation 3-to-8 line decoder/demultiplexer; inverting 74lvc138a pinning pin symbol description 1 a0 address input 2 a1 address input 3 a2 address input 4 e1 enable input (active low) 5 e2 enable input (active low) 6 e3 enable input (active high) 7 y7 output 8 gnd ground (0 v) 9 y6 output 10 y5 output 11 y4 output 12 y3 output 13 y2 output 14 y1 output 15 y0 output 16 v cc supply voltage handbook, halfpage 138 mna369 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 a0 a1 a2 e1 e2 e3 y7 gnd y6 y5 y4 y3 y2 y1 y0 v cc fig.1 pin configuration so16 and (t)ssop16. handbook, halfpage 116 gnd (1) a0 v cc 8 2 3 4 5 7 a1 a2 e1 e2 e3 15 14 13 12 10 611 9 gnd top view mce177 y7 y6 y5 y4 y3 y2 y1 y0 fig.2 pin configuration dhvqfn16. (1) the die substrate is attached to this pad using conductive die attach material. it can not be used as a supply pin or input.
2003 may 06 5 philips semiconductors product speci?cation 3-to-8 line decoder/demultiplexer; inverting 74lvc138a handbook, halfpage y0 y1 y2 y3 y4 y5 y6 y7 7 9 10 11 12 13 14 15 a0 a1 a2 3 2 1 6 5 4 e2 e1 e3 mna370 fig.3 logic symbol. handbook, halfpage mna371 7 9 10 11 12 13 14 & x/y 15 7 en 6 5 4 3 2 1 0 6 5 4 3 2 1 1 4 2 7 9 10 11 12 13 14 & dx (a) (b) 15 7 6 5 4 3 2 1 0 6 5 4 3 2 1 0 2 g 0 7 fig.4 logic symbol (ieee/iec). handbook, halfpage mna372 enable exiting y0 y1 y2 y3 y4 y5 y6 y7 7 9 10 11 12 13 14 15 a0 a1 a2 3-to-8 decoder 3 2 1 6 5 4 e2 e1 e3 fig.5 functional diagram.
2003 may 06 6 philips semiconductors product speci?cation 3-to-8 line decoder/demultiplexer; inverting 74lvc138a recommended operating conditions limiting values in accordance with the absolute maximum rating system (iec 60134); voltages are referenced to gnd (groun d=0v). notes 1. the input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. for so16 packages: above 70 c the value of p d derates linearly with 8 mw/k. for (t)ssop16 packages: above 60 c the value of p d derates linearly with 5.5 mw/k. for dhvqfn16 packages: above 60 c the value of p d derates linearly with 4.5 mw/k. symbol parameter conditions min. max. unit v cc supply voltage for maximum speed performance 2.7 3.6 v for low voltage applications 1.2 3.6 v v i input voltage 0 5.5 v v o output voltage output high or low state 0 v cc v t amb operating ambient temperature - 40 +125 c t r ,t f input rise and fall times v cc = 1.2 to 2.7 v 0 20 ns/v v cc = 2.7 to 3.6 v 0 10 ns/v symbol parameter conditions min. max. unit v cc supply voltage - 0.5 +6.5 v i ik input diode current v i <0 -- 50 ma v i input voltage note 1 - 0.5 +6.5 v i ok output diode current v o >v cc or v o <0 - 50 ma v o output voltage output high or low state; note 1 - 0.5 v cc + 0.5 v i o output source or sink current v o =0tov cc - 50 ma i cc , i gnd v cc or gnd current - 100 ma t stg storage temperature - 65 +150 c p tot power dissipation t amb = - 40 to +125 c; note 2 - 500 mw
2003 may 06 7 philips semiconductors product speci?cation 3-to-8 line decoder/demultiplexer; inverting 74lvc138a dc characteristics at recommended operating conditions; voltages are referenced to gnd (groun d=0v). symbol parameter test conditions min. typ. (1) max. unit other v cc (v) t amb = - 40 to +85 c v ih high-level input voltage 1.2 v cc -- v 2.7 to 3.6 2.0 -- v v il low-level input voltage 1.2 -- gnd v 2.7 to 3.6 -- 0.8 v v oh high-level output voltage v i =v ih or v il i o = - 100 m a 2.7 to 3.6 v cc - 0.2 v cc - v i o = - 12 ma 2.7 v cc - 0.5 -- v i o = - 18 ma 3.0 v cc - 0.6 -- v i o = - 24 ma 3.0 v cc - 0.8 -- v v ol low-level output voltage v i =v ih or v il i o = 100 m a 2.7 to 3.6 - gnd 0.2 v i o = 12 ma 2.7 -- 0.4 v i o = 24 ma 3.0 -- 0.55 v i li input leakage current v i = 5.5 v or gnd 3.6 - 0.1 5 m a i cc quiescent supply current v i =v cc or gnd; i o =0 3.6 - 0.1 10 m a d i cc additional quiescent supply current per input pin v i =v cc - 0.6 v; i o =0 2.7 to 3.6 - 5 500 m a
2003 may 06 8 philips semiconductors product speci?cation 3-to-8 line decoder/demultiplexer; inverting 74lvc138a note 1. all typical values are measured at v cc = 3.3 v and t amb =25 c. t amb = - 40 to +125 c v ih high-level input voltage 1.2 v cc -- v 2.7 to 3.6 2.0 -- v v il low-level input voltage 1.2 -- gnd v 2.7 to 3.6 -- 0.8 v v oh high-level output voltage v i =v ih or v il i o = - 100 m a 2.7 to 3.6 v cc - 0.3 -- v i o = - 12 ma 2.7 v cc - 0.65 -- v i o = - 18 ma 3.0 v cc - 0.75 -- v i o = - 24 ma 3.0 v cc - 1 -- v v ol low-level output voltage v i =v ih or v il i o = 100 m a 2.7 to 3.6 -- 0.3 v i o = 12 ma 2.7 -- 0.6 v i o = 24 ma 3.0 -- 0.8 v i li input leakage current v i = 5.5 v or gnd 3.6 -- 20 m a i cc quiescent supply current v i =v cc or gnd; i o =0 3.6 -- 40 m a d i cc additional quiescent supply current per input pin v i =v cc - 0.6 v; i o =0 2.7 to 3.6 -- 5000 m a symbol parameter test conditions min. typ. (1) max. unit other v cc (v)
2003 may 06 9 philips semiconductors product speci?cation 3-to-8 line decoder/demultiplexer; inverting 74lvc138a ac characteristics gnd = 0 v; t r =t f 2.5 ns. notes 1. typical values are measured at v cc = 3.3 v. 2. skew between any two outputs of the same package switching in the same direction. this parameter is guaranteed by design. symbol parameter test conditions min. typ. (1) max. unit waveforms v cc (v) t amb = - 40 to +85 c t phl /t plh propagation delay an to yn see figs 6 and 8 1.2 - 14 - ns 2.7 1.5 3.1 6.8 ns 3.0 to 3.6 1.0 2.6 5.8 ns propagation delay e3 to yn see figs 6 and 8 1.2 - 14 - ns 2.7 1.5 3.2 6.8 ns 3.0 to 3.6 1.0 2.8 5.8 ns propagation delay en to yn see figs 7 and 8 1.2 - 15 - ns 2.7 1.5 3.2 6.4 ns 3.0 to 3.6 1.0 2.7 5.8 ns t sk(0) skew note 2 -- 1.0 ns t amb = - 40 to +125 c t phl /t plh propagation delay an to yn see figs 6 and 8 1.2 --- ns 2.7 1.5 - 8.5 ns 3.0 to 3.6 1.0 - 7.5 ns propagation delay e3 to yn see figs 6 and 8 1.2 --- ns 2.7 1.5 - 8.5 ns 3.0 to 3.6 1.0 - 7.5 ns propagation delay en to yn see figs 7 and 8 1.2 --- ns 2.7 1.5 - 8.0 ns 3.0 to 3.6 1.0 - 7.5 ns t sk(0) skew note 2 -- 1.5 ns
2003 may 06 10 philips semiconductors product speci?cation 3-to-8 line decoder/demultiplexer; inverting 74lvc138a ac waveforms handbook, halfpage mna373 an, e3 input yn output t phl t plh gnd v cc v m v m v oh v ol fig.6 the inputs an, e3 to outputs yn propagation delays. v m = 1.5 v at v cc 3 2.7 v; v m = 0.5v cc at v cc < 2.7 v; v ol and v oh are typical output voltage drop that occur with the output load. handbook, halfpage mna374 e1, e2 input yn output t phl t plh gnd v cc v m v m v oh v ol fig.7 the inputs en to outputs yn propagation delays. v m = 1.5 v at v cc 3 2.7 v; v m = 0.5v cc at v cc < 2.7 v; v ol and v oh are typical output voltage drop that occur with the output load.
2003 may 06 11 philips semiconductors product speci?cation 3-to-8 line decoder/demultiplexer; inverting 74lvc138a handbook, full pagewidth open gnd 50 pf 2 v cc v cc v i v o mna368 d.u.t. c l r t r l 500 w r l 500 w pulse generator s1 fig.8 load circuitry for switching times. v cc v i t plh /t phl 1.2 v v cc open 2.7 v 2.7 v open 3.0 to 3.6 v 2.7 v open definitions for test circuit: r l = load resistor. c l = load capacitance including jig and probe capacitance. r t = termination resistance should be equal to the output impedance z o of the pulse generator.
2003 may 06 12 philips semiconductors product speci?cation 3-to-8 line decoder/demultiplexer; inverting 74lvc138a package outlines x w m q a a 1 a 2 b p d h e l p q detail x e z e c l v m a (a ) 3 a 8 9 1 16 y pin 1 index unit a max. a 1 a 2 a 3 b p cd (1) e (1) (1) eh e ll p qz y w v q references outline version european projection issue date iec jedec jeita mm inches 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 10.0 9.8 4.0 3.8 1.27 6.2 5.8 0.7 0.6 0.7 0.3 8 0 o o 0.25 0.1 dimensions (inch dimensions are derived from the original mm dimensions) note 1. plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. 1.0 0.4 sot109-1 99-12-27 03-02-19 076e07 ms-012 0.069 0.010 0.004 0.057 0.049 0.01 0.019 0.014 0.0100 0.0075 0.39 0.38 0.16 0.15 0.05 1.05 0.041 0.244 0.228 0.028 0.020 0.028 0.012 0.01 0.25 0.01 0.004 0.039 0.016 0 2.5 5 mm scale so16: plastic small outline package; 16 leads; body width 3.9 mm sot109-1
2003 may 06 13 philips semiconductors product speci?cation 3-to-8 line decoder/demultiplexer; inverting 74lvc138a unit a 1 a 2 a 3 b p cd (1) e (1) eh e ll p qz y w v q references outline version european projection issue date iec jedec jeita mm 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 6.4 6.0 5.4 5.2 0.65 1.25 7.9 7.6 1.03 0.63 0.9 0.7 1.00 0.55 8 0 o o 0.13 0.2 0.1 dimensions (mm are the original dimensions) note 1. plastic or metal protrusions of 0.25 mm maximum per side are not included. sot338-1 99-12-27 03-02-19 (1) w m b p d h e e z e c v m a x a y 1 8 16 9 q a a 1 a 2 l p q detail x l (a ) 3 mo-150 pin 1 index 0 2.5 5 mm scale ssop16: plastic shrink small outline package; 16 leads; body width 5.3 mm sot338-1 a max. 2
2003 may 06 14 philips semiconductors product speci?cation 3-to-8 line decoder/demultiplexer; inverting 74lvc138a unit a 1 a 2 a 3 b p cd (1) e (2) (1) eh e ll p qz y w v q references outline version european projection issue date iec jedec jeita mm 0.15 0.05 0.95 0.80 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.2 0.4 0.3 0.40 0.06 8 0 o o 0.13 0.1 0.2 1 dimensions (mm are the original dimensions) notes 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. plastic interlead protrusions of 0.25 mm maximum per side are not included. 0.75 0.50 sot403-1 mo-153 99-12-27 03-02-18 w m b p d z e 0.25 18 16 9 q a a 1 a 2 l p q detail x l (a ) 3 h e e c v m a x a y 0 2.5 5 mm scale tssop16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm sot403-1 a max. 1.1 pin 1 index
2003 may 06 15 philips semiconductors product speci?cation 3-to-8 line decoder/demultiplexer; inverting 74lvc138a terminal 1 index area 0.5 1 a 1 e h b unit y e 0.2 c references outline version european projection issue date iec jedec jeita mm 3.6 3.4 d h 2.15 1.85 y 1 2.6 2.4 1.15 0.85 e 1 2.5 0.30 0.18 0.05 0.00 0.05 0.1 dimensions (mm are the original dimensions) sot763-1 mo-241 - - - - - - 0.5 0.3 l 0.1 v 0.05 w 0 2.5 5 mm scale sot763-1 dhvqfn16: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 16 terminals; body 2.5 x 3.5 x 0.85 mm a (1) max. a a 1 c detail x y y 1 c e l e h d h e e 1 b 27 15 10 9 8 1 16 x d e c b a terminal 1 index area a c c b v m w m e (1) note 1. plastic or metal protrusions of 0.075 mm maximum per side are not included. d (1) 02-10-17 03-01-27
2003 may 06 16 philips semiconductors product speci?cation 3-to-8 line decoder/demultiplexer; inverting 74lvc138a soldering introduction to soldering surface mount packages this text gives a very brief insight to a complex technology. a more in-depth account of soldering ics can be found in our data handbook ic26; integrated circuit packages (document order number 9398 652 90011). there is no soldering method that is ideal for all surface mount ic packages. wave soldering can still be used for certain surface mount ics, but it is not suitable for fine pitch smds. in these situations reflow soldering is recommended. re?ow soldering reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. several methods exist for reflowing; for example, convection or convection/infrared heating in a conveyor type oven. throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. typical reflow peak temperatures range from 215 to 250 c. the top-surface temperature of the packages should preferably be kept: below 220 c for all the bga packages and packages with a thickness 3 2.5mm and packages with a thickness <2.5 mm and a volume 3 350 mm 3 so called thick/large packages below 235 c for packages with a thickness <2.5 mm and a volume <350 mm 3 so called small/thin packages. wave soldering conventional single wave soldering is not recommended for surface mount devices (smds) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. to overcome these problems the double-wave soldering method was specifically developed. if wave soldering is used the following conditions must be observed for optimal results: use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. for packages with leads on two sides and a pitch (e): C larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; C smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. the footprint must incorporate solder thieves at the downstream end. for packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. the footprint must incorporate solder thieves downstream and at the side corners. during placement and before soldering, the package must be fixed with a droplet of adhesive. the adhesive can be applied by screen printing, pin transfer or syringe dispensing. the package can be soldered after the adhesive is cured. typical dwell time is 4 seconds at 250 c. a mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. manual soldering fix the component by first soldering two diagonally-opposite end leads. use a low voltage (24 v or less) soldering iron applied to the flat part of the lead. contact time must be limited to 10 seconds at up to 300 c. when using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 c.
2003 may 06 17 philips semiconductors product speci?cation 3-to-8 line decoder/demultiplexer; inverting 74lvc138a suitability of surface mount ic packages for wave and re?ow soldering methods notes 1. for more detailed information on the bga packages refer to the (lf)bga application note (an01026); order a copy from your philips semiconductors sales office. 2. all surface mount (smd) packages are moisture sensitive. depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). for details, refer to the drypack information in the data handbook ic26; integrated circuit packages; section: packing methods . 3. these packages are not suitable for wave soldering. on versions with the heatsink on the bottom side, the solder cannot penetrate between the printed-circuit board and the heatsink. on versions with the heatsink on the top side, the solder might be deposited on the heatsink surface. 4. if wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. the package footprint must incorporate solder thieves downstream and at the side corners. 5. wave soldering is suitable for lqfp, tqfp and qfp packages with a pitch (e) larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 6. wave soldering is suitable for ssop, tssop, vso and vssop packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. package (1) soldering method wave reflow (2) bga, lbga, lfbga, sqfp, tfbga, vfbga not suitable suitable dhvqfn, hbcc, hbga, hlqfp, hsqfp, hsop, htqfp, htssop, hvqfn, hvson, sms not suitable (3) suitable plcc (4) , so, soj suitable suitable lqfp, qfp, tqfp not recommended (4)(5) suitable ssop, tssop, vso, vssop not recommended (6) suitable
2003 may 06 18 philips semiconductors product speci?cation 3-to-8 line decoder/demultiplexer; inverting 74lvc138a data sheet status notes 1. please consult the most recently issued data sheet before initiating or completing a design. 2. the product status of the device(s) described in this data sheet may have changed since this data sheet was published. the latest information is available on the internet at url http://www.semiconductors.philips.com. 3. for data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. level data sheet status (1) product status (2)(3) definition i objective data development this data sheet contains data from the objective speci?cation for product development. philips semiconductors reserves the right to change the speci?cation in any manner without notice. ii preliminary data quali?cation this data sheet contains data from the preliminary speci?cation. supplementary data will be published at a later date. philips semiconductors reserves the right to change the speci?cation without notice, in order to improve the design and supply the best possible product. iii product data production this data sheet contains data from the product speci?cation. philips semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. relevant changes will be communicated via a customer product/process change noti?cation (cpcn). definitions short-form specification ? the data in a short-form specification is extracted from a full data sheet with the same type number and title. for detailed information see the relevant data sheet or data handbook. limiting values definition ? limiting values given are in accordance with the absolute maximum rating system (iec 60134). stress above one or more of the limiting values may cause permanent damage to the device. these are stress ratings only and operation of the device at these or at any other conditions above those given in the characteristics sections of the specification is not implied. exposure to limiting values for extended periods may affect device reliability. application information ? applications that are described herein for any of these products are for illustrative purposes only. philips semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. disclaimers life support applications ? these products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. philips semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify philips semiconductors for any damages resulting from such application. right to make changes ? philips semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. when the product is in full production (status production), relevant changes will be communicated via a customer product/process change notification (cpcn). philips semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
2003 may 06 19 philips semiconductors product speci?cation 3-to-8 line decoder/demultiplexer; inverting 74lvc138a notes
? koninklijke philips electronics n.v. 2003 sca75 all rights are reserved. reproduction in whole or in part is prohibited without the prior written consent of the copyright owne r. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. no liability will be accepted by the publisher for any consequence of its use. publication thereof does not con vey nor imply any license under patent- or other industrial or intellectual property rights. philips semiconductors C a worldwide company contact information for additional information please visit http://www.semiconductors.philips.com . fax: +31 40 27 24825 for sales of?ces addresses send e-mail to: sales.addresses@www.semiconductors.philips.com . printed in the netherlands 613508/04/pp 20 date of release: 2003 may 06 document order number: 9397 750 10535

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